Abstract
We report the development of a vacuum-evaporation route for the roll-to-roll fabrication of functioning organic circuits. A number of key findings and observations are highlighted which influenced the eventual fabrication protocol adopted. Initially, the role of interface roughness in determining carrier mobility in thin film transistors (TFTs) is investigated. Then it is shown that TFT yield is higher for devices fabricated on a flash-evaporated-plasma-polymerised tri(propyleneglycol) diacrylate (TPGDA) gate dielectric than for TFTs based on a spin-coated polystyrene (PS) dielectric. However, a degradation in mobility is observed which is attributed to the highly polar TPGDA surface. It is shown that high mobility, low gate-leakage currents and excellent stability are restored when the surface of TPGDA was buffered with a thin, spin-coated PS film. The resulting baseline process allowed arrays of functional circuits such as ring oscillators, NOR/NAND logic gates and S–R latches to be fabricated with high yield and their performance to be simulated.
Highlights
The most widely adopted approaches for the roll-to-roll (R2R) fabrication of organic electronic devices and circuits are generally based on solution processing e.g. inkjet [1,2,3] and gravure [4,5,6,7] printing which have been used in combination with other methods including screen and flexo printing [8,9]
We reported on the feasibility of a vacuum-evaporation route for organic thin film transistor (OTFT) fabrication some years ago [17]
In the foregoing we have described the development of a vacuum-evaporation-based approach for the roll-to-roll fabrication of organic electronic circuits
Summary
The most widely adopted approaches for the roll-to-roll (R2R) fabrication of organic electronic devices and circuits are generally based on solution processing e.g. inkjet [1,2,3] and gravure [4,5,6,7] printing which have been used in combination with other methods including screen and flexo printing [8,9]. The best performing organic circuits to date, have been achieved by combining solution processing with a photolithographic step [10,11,12,13]. The latter allows much higher resolution features to be formed which is especially important for defining the source–drain gap (channel length, L) in thin film transistors (TFTs). Incorporating a photolithographic step into a roll-to-roll process is not trivial
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