Fabrication and Performance of InAlN/GaN-on-Si MOSHEMTs with LaAlO3 Gate Dielectric Using Gate-First CMOS Compatible Process at Low Thermal Budget

Abstract

A gate-first CMOS compatible process at low thermal budget to fabricate InAlN/GaN-on-Si MOSHEMTs is reported. This is made possible by a good quality LaAlO3 gate dielectric (k ~ 21.8) and Hf/Al/Ta ohmic contacts that require low annealing temperature. The reverse leakage current of the W/LaAlO3 gate stack remains low (< 3´10-7 mA/mm at -10 V) upon ohmic contact annealing at 600 oC. The fabricated LaAlO3 gate dielectric MOSHEMTs demonstrate a reasonable DC performance (Idsat ~ 510 mA/mm, Gmax ~ 44 mS/mm) for a 1 μm gate length device.