Extraction of Packaged GaN Power Transistors Parasitics Using S-Parameters

Abstract

In order to better predict the high-frequency switching operation of transistors in power converters, parasitic elements of these devices such as resistances, inductances, and capacitances must be accurately evaluated. This paper reports on the characterization of a gallium nitride (GaN) packaged power transistor using S-parameters in order to extract the device parasitics. Because the transistor is packaged, a calibration technique is carried out using specific test fixtures designed on FR4 printed circuit board (PCB) in order to get the S-parameters in the transistor plane from the measurement. The proposed method is suitable for a wide range of power devices. In this paper, it is applied to an enhancement-mode GaN high electron mobility transistor (HEMT). The impact of junction temperature on drain and source resistances is also evaluated. According to characterization results, equation-based modeling is proposed for the nonlinear parameters. The extracted parasitic elements are compared with reference values given by the device manufacturer.