Exploring soft errors (SEUs) with digital imager pixels ranging from 7 to 1.3 μm

Abstract

When high-energy cosmic particles hit pixels in digital imagers (cameras) they deposit charges as in CMOS digital circuits. In regular ICs this charge deposition sometimes changes a flip-flop's state, creating a short lived Soft Error or a Single Event Upset (SEU). SEUs are hard to study in ICs as the error is buried within the chip. By comparison in digital camera CMOS Active Pixel Sensor pixels the deposited charge is captured, appearing like illuminated pixel(s) whose value is related directly to the deposited charge. Thus a series of dark field (unilluminated) images records SEU information. Digital camera SEU analysis provides important information about the nature and charge deposited by particle hits, their occurrence rate, and the charge spread area. In this paper we extend the study from 7 μm–4 μm (DSLR cameras) down to 1.2 μm (cell phone) to better understand the SEU process in both digital imagers and regular ICs. As the smallest pixels are found in cell phone imagers special techniques were developed to test these. Tests on multiple phones of 1.34 μm pixels showed SEU rates/cm2/s which were ∼10X that of the larger pixel imagers. SEUs were mostly confined to single pixels indicating the charge spread was less than 1.34 μm.