Abstract

Functional near‐infrared spectroscopy (fNIRS) systems for e‐health applications usually suffer from poor signal detection, mainly due to a low end‐to‐end signal‐to‐noise ratio of the electronics chain. Lock‐in amplifiers (LIA) historically represent a powerful technique helping to improve performance in such circumstances. In this work a digital LIA system, based on a Zynq® field programmable gate array (FPGA) has been designed and implemented, in an attempt to explore if this technique might improve fNIRS system performance. More broadly, FPGA‐based solution flexibility has been investigated, with particular emphasis applied to digital filter parameters, needed in the digital LIA, and its impact on the final signal detection and noise rejection capability has been evaluated. The realized architecture was a mixed solution between VHDL hardware modules and software modules, running within a microprocessor. Experimental results have shown the goodness of the proposed solutions and comparative details among different implementations will be detailed. Finally a key aspect taken into account throughout the design was its modularity, allowing an easy increase of the input channels while avoiding the growth of the design cost of the electronics system.

Highlights

  • The study of lock-in techniques to detect and measure very small signals, usually buried deeply in high level noise, has been investigated since the late 1940s [1,2]

  • The design principles described in this paper may be relevant to other

  • The design principles described in this paper may be relevant to other research areas

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Summary

Introduction

The study of lock-in techniques to detect and measure very small signals, usually buried deeply in high level noise, has been investigated since the late 1940s [1,2]. Lock-in amplification is mainly a phase-sensitive detection technique capable of isolating a segment of the signal at a specific reference frequency and phase. Even if this signal is buried in noise sources many times larger, the system cuts down and strongly rejects the noise signals at frequencies other than a reference “locked-in” frequency, so that they do not affect the signal measurement. Since the advent of powerful digital systems, namely DSP (digital signal processing), 32-bit microprocessors with internal DSP capabilities, ASICs (application specific integrated circuits) and PLDs (programmable logic devices) or field programmable gate arrays, progressively replaced analog models by outperforming them in every aspect, such as the allowable frequency range, the level of input noise and the stability—all of them directly related to the sampling speed of the front-end

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