Exploring Approximate Computing and Near- Threshold Operation to Design Energy -efficient Multipliers

Abstract

Multiplier circuits are components of particular relevance for digital systems. Hardware projects often require fast and low-power multipliers. In this regard, this work evaluates a set of multiplier circuits to explore alternative approaches for energy-efficient scenarios. This work explores two techniques for energy efficiency: reducing the operating voltage (near-threshold operation) and through Approximate Computing. Two approximate adders are adopted in the lower bits. Altogether, eight operation scenarios are considered and evaluated at the electrical level, providing an overall discussion of the most indicate approaches for different design requirements. The results show that by applying near-threshold operation, it is possible to achieve a considerable reduction in power consumption, however, with a significant increase in delay times. The replacement of exact Mirror adders by approximate AMA2 provided a reduction of up to 29.6% in energy consumption and up to 4% in delay for the evaluated multiplier circuits.