Exploration of Non-Volatile MTJ/CMOS Circuits for DPA-Resistant Embedded Hardware

Abstract

Magnetic tunnel junction (MTJ/CMOS-based Logic-in-Memory (LiM) circuits have nearly zero leakage power dissipation, and they are very appropriate to design low-power hardware. However, the differences in power consumption between the switching of MTJ devices increase the vulnerability of differential power analysis (DPA)-based side-channel attacks. Furthermore, the MTJ/CMOS hybrid logic circuits that require frequent switching of MTJs are not very energy efficient due to the significant energy required to switch the MTJ devices. MTJ/CMOS circuits consume uniform power if there is no switching of MTJs. In this article, we have investigated the novel approach of building cryptographic hardware in MTJ/CMOS circuits using a lookup table (LUT)-based method where the data stored in MTJs are constant during the entire encryption/decryption operation. As a case study, we have designed a non-linear bijective function of the PRESENT-80 lightweight cryptographic algorithm called substitution box or S-box and one round of PRESENT-80 cryptographic hardware using MTJ/CMOS circuits. The designs are simulated using 45 nm CMOS technology with perpendicular anisotropy CoFeB/MgO MTJ model using Cadence Spectre simulator. From our simulations, we found that the PRESENT-80 S-box circuit and one round of PRESENT-80 cryptographic hardware implemented using MTJ/CMOS circuits save up to 26% and 29% of energy, respectively, compared to the conventional CMOS-based designs at 50 MHz. Furthermore, the security of the MTJ/CMOS circuits has been evaluated by performing a simulation-based DPA attack. From our simulations, we found that the PRESENT-80 cryptographic hardware implemented using MTJ/CMOS circuits is resistant against DPA attack. Low-energy and DPA-resistant property along with high density and low leakage make MTJ/CMOS circuits suitable to implement in low-energy and secure embedded cryptographic hardware.