Exploiting FPGA I/O for cheaper PCBs

Abstract

Its not widely known but FPGAs have the flexibility to reduce PCB re-spins and manufacturing costs. This paper describes ways that designers can address PCB manufacturing complexities by exploiting new features of modern FPGA architectures to reduce PCB routing congestion and the number of design iterations. With the right software tools and close collaboration between the parallel paths of FPGA and PCB design, weeks or months can be trimmed from FPGA design and implementation schedules, thus providing significant long-term cost savings.