Abstract
In this paper, we share our practical experience gained during the development of CMOS-MEMS (Complementary Metal-Oxide Semiconductor Micro Electro Mechanical Systems) devices in IHP SG25 technology. The experimental prototyping process is illustrated with examples of three CMOS-MEMS chips and starts from rough process exploration and characterization, followed by the definition of the useful MEMS design space to finally reach CMOS-MEMS devices with inertial mass up to 4.3 g and resonance frequency down to 4.35 kHz. Furthermore, the presented design techniques help to avoid several structural and reliability issues such as layer delamination, device stiction, passivation fracture or device cracking due to stress.
Highlights
In the last decades, MicroElectroMechanical Systems (MEMS) have demonstrated a steady trend of miniaturization as well as cost and power consumption reduction, while maintaining or improving performance
Accelerometers and gyroscopes are either multi-chip modules or at least a separate MEMS process is applied to the same wafer to deploy the mechanical device next to the electronics or on top of a CMOS micromachining, where standard CMOS back-end of line (BEOL) layers are used as MEMS structural and sacrificial materials, has been a promising approach for many years
More recently with the advent of Analog/ Radio-Frequency (RF)-oriented microelectronic technologies, significant effort has been made to develop RF-MEMS devices such as switches [3] or resonators [4] by using simple isotropic etching of inter-metal dielectric (IMD) of the CMOS BEOL [5,6]
Summary
MicroElectroMechanical Systems (MEMS) have demonstrated a steady trend of miniaturization as well as cost and power consumption reduction, while maintaining or improving performance. More recently with the advent of Analog/ Radio-Frequency (RF)-oriented microelectronic technologies, significant effort has been made to develop RF-MEMS devices such as switches [3] or resonators [4] by using simple isotropic etching of inter-metal dielectric (IMD) of the CMOS BEOL [5,6]. This method offers possibly a very cost-effective solution as only simple post-processing is needed.
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