Abstract

Analog comparator arrays fabricated on a bulk CMOS 130-nm are measured to quantify input-referred offsets due to transistor variation and kickback noise. Comparators using RHBD edgeless and conventional two-edge transistors are compared to determine the impact on the circuit behavior. Both random variation and kickback noise are slightly larger than for an equivalent design using two-edge transistors. The input-referred offsets are shown to be completely systematic.

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