Experimental Observation of Quantum Confinement Effect in and Silicon Nanowire Field-Effect Transistors and Single-Electron/Hole Transistors Operating at Room Temperature

Abstract

The quantum confinement effect (QCE) in ultranarrow silicon nanowire channel field-effect transistors (FETs) as well as single-electron/hole transistors (SET/SHTs) operating at room temperature is intensively investigated for the optimization of device design and fabrication. By adopting a “shared channel” structure with the directions of <110> and <100>, a carrier-dependent QCE is systematically examined. It is found that <110> nanowire pFETs exhibit a smaller threshold voltage (Vth) variability due to a weaker QCE, while <110> nFETs and <100> n/pFETs show comparable Vth variabilities coming from the QCE. It is also found that only SETs exhibit clear Coulomb oscillations in the case of the <110> channel, suggesting the formation of higher tunnel barriers than SHTs. On the other hand, <100> SHTs show undesirable multidot behavior in spite of their comparable QCEs for electrons and holes. It is concluded that <110>-directed nanowire channel SETs and n/pFETs are suitable for the integration of CMOS and SETs.