Experimental Investigations of Electron Mobility in Silicon Nanowire nMOSFETs on (110) Silicon-on-Insulator

Abstract

Investigations on electron mobility characteristics in gate-all-around silicon nanowire nMOSFETs on (110)-oriented silicon-on-insulator substrates have been described on the basis of the advanced split capacitance-voltage ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> - <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> ) method. It is found that the electron mobility in [110]-directed nanowires approaches and is even higher than that in [100]-directed nanowires as the nanowire width is reduced. As a result, mobility degradation in (110) planar nMOSFETs can be recovered to some extent by utilizing [110]-directed nanowires on (110)-oriented substrates. The underlying physical mechanisms are also discussed.