Abstract

The experimental investigation of the time dependent dielectric breakdown (TDDB) was performed to study the dielectric breakdown mechanisms for Hf0.5Zr0.5O2 (HZO) ferroelectric field-effect transistors (FeFETs) with the SiO2 interfacial layer (IL). Constant voltage stress method combined with the TCAD device simulation was used to study the breakdown mechanism of the TaN/HZO/SiO2/Si gate stack. Due to the much higher electric field in the IL, the breakdown of the SiO2 IL is the major reason for the breakdown of the gate stack. In addition, it is found that the IL breakdown will speed up the disappearance of the memory window (MW), leading to the malfunction of the FeFET as a storage device. Finally, the Weibull distributions of time-to-breakdown (TBD) and charge-to-breakdown (QBD) were characterized, revealing decent TDDB performance of the FeFETs. Careful design of IL thickness is necessary to balance the tradeoff between the device performance and the reliability lifetime of HZO FeFETs.

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