Experimental and theoretical study of capacitive memory of metal-oxide-semiconductor devices based on Er-doped In2O3 nano-column arrays

Abstract

The enhanced electronic memory performance of glancing angle deposited erbium-doped indium oxide (In2O3:Er) transparent nano-column (NCol) based metal-oxide-semiconductor (MOS) structured memory devices is reported. The fabricated MOS devices are Au/In2O3/p-Si, Au/0.26 at. % In2O3:Er/p-Si, and Au/0.48 at. % In2O3:Er/p-Si. The capacitance–voltage (C–V), conductance–voltage (G–V), C–V hysteresis, endurance, and retention properties from the cyclic current–voltage (I–V) curve of the fabricated devices were investigated in detail. The overall interface state density (Dit) for the devices at the different applied frequency (f) decreases with the increase in Er doping. The observations obtained from C–V, G–V, and Dit–f curves were theoretically explained considering a modified delta depletion model. It was found that Au/0.48 at. % In2O3:Er/p-Si does not go to inversion even at a high applied voltage. The constant capacitive memory window (MW) for Au/In2O3/p-Si is ∼1 V at the depletion region. MW increases from ∼0.6 V (sweep voltage ±6 V) to ∼2.5 V (sweep voltage ±16 V) and ∼1.4 V (sweep voltage ±6 V) to ∼6.8 V (sweep voltage ±16 V), respectively, for Au/0.26 at. % In2O3:Er/p-Si and Au/0.48 at. % In2O3:Er/p-Si. The increased MWs despite reduced Dit is explained in detail by primarily considering increased polarization switching of the In-O-Er material, asymmetric charge injection from the top electrode, and the presence of the oxygen-rich environment. The I–V hysteresis performance of the devices under a reverse bias was also improved with Er doping due to the migration of O2− inside the oxide layer. The whole analysis indicates that the gate-controlled Au/0.48 at. % In2O3:Er/p-Si MOS device is appropriate for capacitive memory applications.