Experimental and simulation analysis of electrical characteristics of common‐source current mirrors implemented with asymmetric self‐cascode silicon‐on‐insulator n‐channel metal–oxide–semiconductor field‐effect transistors

Abstract

In this paper, the performance of asymmetric self-cascode (A-SC) fully depleted silicon-on-insulator n-channel metal–oxide–semiconductor field-effect transistors configuration applied to common-source current mirrors (CMs) have been analysed through experimental measurements, comparing with symmetric self-cascode configuration as well as with standard uniformly doped transistor. The mirroring precision, output resistance and output swing have been used as figures of merit to evaluate the improvements achieved with the use of A-SC transistors. Two-dimensional numerical simulations have been also performed in order to further explore the advantages of A-SC transistor in common-source CMs. The obtained results have shown that the best mirroring precision has been obtained with larger channel lengths of the transistor near the source. Despite the worsened intrinsic mismatching presented by common-source CMs implemented with A-SC transistors in comparison with single transistor CM, the A-SC structure has allowed larger output resistance, breakdown voltage and better mirroring precision.