Expandable ATOM switch architecture (XATOM) for ATM LANs

Abstract

There is growing interest in building ATM switch based LANs as the next generation local area networks, which overcomes performance limitations of shared media type LANs, such as Ethernet and FDDI. Since LAN terminals tend to transmit packets at the same speed as that of network links, such as at 100 Mbps, ATM LAN switches are inevitable to provide much larger buffer capacity than public network ATM switches, which are designed to accommodate lower-speed data services than the network link speed. Moreover, both low delay switching and multicast functions are required for multimedia applications. Responding to these requirements, this paper proposes a new switch architecture, referred to as expandable ATOM switch (XATOM), which is a kind of input and output buffer switch architecture, and can expand the buffer capacity simply by adding low cost memory chips. By combining low-speed and large capacity input-buffer memories and a backpressure control between input and output buffers, the XATOM switch can achieve high-throughput with low cell loss rate even in high-speed burst traffic environments. Since contention among multiple input buffers is eliminated in the XATOM switch, the input buffer management, both for avoiding head-of-line blocking and for supporting priority and multicast control functions, can be easily implemented. Delay and cell loss probability for the XATOM switch have been evaluated based on simulation study results. The paper also discusses some implementation specific details. >