Abstract
This paper describes evolutionary simulation-based validation, a new point in the spectrum of design validation techniques, besides pseudo-random simulation, designer-generated patterns and formal verification. The proposed approach is based on coupling an evolutionary algorithm with a hardware simulator, and it is able to fit painlessly in an existing industrial flow. Prototypical tools were used to validate gate-level designs, comparing them against both their RT-level specifications and different gate-level implementations. Experimental results show that the proposed method is effectively able to deal with realistic designs, discovering potential problems, and, although approximate in nature, it is able to provide a high degree of confidence in the results and it exhibits a natural robustness even when used starting from incomplete information.
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