Abstract
Diamond metal-oxide-semiconductor (MOS) devices are potential candidates for future high-power applications. Al2O3 is the preferred choice for the gate oxide/dielectric owing to multiple advantages, including appropriate band-alignment, interface quality, and compatibility with diamond. The success of diamond MOS devices depends significantly on the quality of the Al2O3/diamond interface. There has been an intense effort in this direction to understand and improve the quality of the interface. While the understanding of this hetero-interface has improved, there are still significant challenges. This work provides further insight where we show the evidence of border traps for p-type O-diamond MOS structure with atomic-layer-deposited (ALD) Al2O3 as a gate dielectric, which has hitherto been neglected. The experimental data shows frequency dispersion of capacitance in the accumulation region for frequencies 1 Hz to 10 MHz. A distributed border traps model fitted to the plot of capacitance versus the logarithm of frequency demonstrates an average border trap density of 1.2 × 1020 cm−3 eV−1 for an oxide thickness of 50 nm. The data is analyzed at three different temperatures of 300, 350, and 400 K. The extracted activation energy for the capture cross-section is 2.96 eV. The origin of border traps is correlated to the presence of Al vacancy in Al2O3, suggesting room for ALD process optimization towards a better interface quality.
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