Evaporative electron cooling in asymmetric double barrier semiconductor heterostructures

Aymen Yangui,Kazuhiko Hirakawa,Naomi Nagai,Tifei Yan,Marc Bescond

doi:10.1038/s41467-019-12488-9

Abstract

Rapid progress in high-speed, densely packed electronic/photonic devices has brought unprecedented benefits to our society. However, this technology trend has in reverse led to a tremendous increase in heat dissipation, which degrades device performance and lifetimes. The scientific and technological challenge henceforth lies in efficient cooling of such high-performance devices. Here, we report on evaporative electron cooling in asymmetric Aluminum Gallium Arsenide/Gallium Arsenide (AlGaAs/GaAs) double barrier heterostructures. Electron temperature, Te, in the quantum well (QW) and that in the electrodes are determined from photoluminescence measurements. At 300 K, Te in the QW is gradually decreased down to 250 K as the bias voltage is increased up to the maximum resonant tunneling condition, whereas Te in the electrode remains unchanged. This behavior is explained in term of the evaporative cooling process and is quantitatively described by the quantum transport theory.

Highlights

Rapid progress in high-speed, densely packed electronic/photonic devices has brought unprecedented benefits to our society
The aim of the present work is to demonstrate that a significant electron cooling as much as 50 K is possible in a semiconductor heterostructure operating at room temperature
The observed cooling behavior is quantitatively confirmed by quantum transport calculations that self-consistently couples the non-equilibrium Green’s function (NEGF) formalism for electrons with the heat equation

Summary

Introduction

Rapid progress in high-speed, densely packed electronic/photonic devices has brought unprecedented benefits to our society. At 300 K, Te in the QW is gradually decreased down to 250 K as the bias voltage is increased up to the maximum resonant tunneling condition, whereas Te in the electrode remains unchanged This behavior is explained in term of the evaporative cooling process and is quantitatively described by the quantum transport theory. The on-chip power density exceeds 100 W cm−2 2,4 leading to lattice temperature above 400 K5 These self-heating effects result in significant reduction in performances[6] and lifetimes of the devices. The materials used to obtain efficient Peltier effect such as BiTe are not compatible with the standard semiconductor fabrication processes Another interesting mechanism for solid-state refrigeration is the thermionic cooling[13]. The observed cooling behavior is quantitatively confirmed by quantum transport calculations that self-consistently couples the non-equilibrium Green’s function (NEGF) formalism for electrons with the heat equation (see Supplementary Methods)

Objectives

Methods

Results

Conclusion