Evaluation of the V SD ‐method for temperature estimation during power cycling of SiC‐MOSFETs

Abstract

An accurate temperature estimation is a substantial necessity to evaluate the outcome of a power cycling test. For devices with a forward biased pn-junction in the main current path, there is a well-known and understood method using its forward voltage drop at a small sensing current. Since metal–oxide–semiconductor field-effect transistors (MOSFETs) do not provide a pn-junction in forward mode, this method cannot be applied directly. A similar method to estimate the junction temperature of a MOSFET is the VSD(T)-method, which uses the junction of the reverse body diode. While this method is gaining wide acceptance for junction temperature estimation during power cycling of silicon carbide MOSFETs, no comprehensive investigation on its accuracy, stability and susceptibility towards degradational shift has been performed so far. In this work, the results of an investigation on the VSD(T)-method with an evaluation of its precision and suitability for temperature estimation during power cycling tests of silicon carbide MOSFETs are presented.