Evaluation of the Strain around an Isolated Shallow Trench and the Impact of Stress on LSI Device Performance

Abstract

We propose a stress-controlled fabrication process for shallow trench isolation (STI) that can reduce stress-originated leakage current. In this paper, the relationships between the electrical characteristics of a transistor and the STI fabrication process parameters were obtained by measurement. Direct measurements of mechanical strain around an STI structure were executed by convergent beam electron diffraction (CBED) analysis, and mechanical strain was simulated by the finite element method (FEM). Transmission electron microscopy (TEM) analysis was also performed. It was revealed that the undesirable leakage current in a transistor was caused by a dislocation in crystal silicon, which was induced by tensile strain perpendicular to the silicon surface. We also found that the mechanical strain is controllable by optimizing the amount of recess of the gap-fill oxide in the STI structure after chemical mechanical polishing (CMP).