Abstract

This paper primarily focuses on an evaluation study for the temperature cycling capability of tin silver solder interconnect in power electronic applications by the impact of die dimensions and die material properties. The study was investigated on finite element analysis perspective on chip/solder/substrate structure. A commercially available chip was chosen in the finite element analysis (FEA) as the nominal base die. Two thermal cycle profiles were utilised. The effect of die area, die thickness and material properties (Si and SiC) on the thermal cycling capability of the solder layer was investigated from FEA perspective. From the FEA, it was concluded that decrease in die thickness resulting in increment of thermal cycling capability of solder layer for both material (Si and SiC). Increase in die area increases the thermal cycling capability of solder. For higher ΔT thermal cycle, solder under SiC die perform better than solder under Si die in terms of thermal cycling capability. When the die thickness become smaller than a threshold value of the thermal cycle regime, solder under Si die have better thermal cycling capability than solder under SiC die. Additionally a parametric study was undertaken for a SiC chip/substrate structure under high ∆T temperature cycling profile for solder layer geometric parameter (wetting angle, titling angle and thickness). From the parametric study which utilised design of experiments (DoE), a wavelet radial basis surrogate model was generated. A sensitivity analysis was performed on surrogate model in order to identify the most influencing parameter. From the sensitivity analysis, it was concluded that wetting angle and solder layer thickness of solder layer have significant impact on the thermal cycling capability of the solder layer.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call