Evaluation of Negative Capacitance Ferroelectric MOSFET for Analog Circuit Applications

Abstract

Negative capacitance ferroelectric (FE) field-effect transistor (FeFET) is promising to address the issue of the increasing power density in digital circuit by realizing sub-60 mV/decade subthreshold swing. This inspires us to evaluate its applications in analog circuit. In this paper, the evaluation is performed based on the equivalent circuit model and through device- and circuit-level benchmarking against MOSFET counterpart. It is found that the selection of FE thickness is important to balance current amplification and saturated output characteristics. As compared with MOSFET, FeFET exhibits a larger current, transconductance, and current-to-transconductance generation efficiency. Its output resistance is smaller in the linear region and larger in the saturation region. It also has less variation in threshold voltage with temperature. When implementing FeFETs into various analog circuit applications, we find that a node capacitor could be discharged within shorter time to increase circuit speed; A better analog switch consisting of complementary FeFETs exhibits a lower and more linear on-resistance; Differential amplifier provides larger voltage amplification to small input signal; Current mirror transfers a more precise output current to the reference one.