Evaluation of Lead-Free Solder Bump Voiding Ball Grid Array Packages Using Laser Ultrasound and Interferometric Technique

Abstract

Solder joint voids are usually formed by the entrapped gas bubbles during the reflow process and are common in all surface mount applications. It is a controversial issue on the reliability of the solder joint; however, the consensus is that voiding is only acceptable at low contents, whereas excessive voiding affects mechanical properties, and decreases strength, ductility, and fatigue life of the interconnections. X-ray is the most widely used technique to evaluate the voids, including the size and occurrence frequency. In this paper, a laser ultrasound and interferometer inspection system is used to inspect the voids in lead-free solder bumps in ball grid array packages. This system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages in the thermoelastic regime; and laser interferometer is used to measure the transient out-of-plane displacement response of the package surface to the laser irradiation. The quality of solder bumps is evaluated by analyzing the transient responses. In this paper, voids are intentionally created by adding the volatile flux during the assembly process. Through controlling the volume of flux dip, three different levels of voiding are proposed: 1) void free; 2) relatively low; and 3) relatively high. The presence of voids in the solder bumps is first verified using a 2-D X-ray technique. Meanwhile, the built-in image-processing software in X-ray tool measures the void fraction to quantify the level of voiding. A scanning acoustic microscope technique is also used to evaluate the void in the solder bumps. Then the laser ultrasound inspection system is used to evaluate the voids in these samples. Through comparing the vibration responses from the chip with solder bump voids and void-free chips, it is found that the laser ultrasound inspection system is capable of differentiating the chips with relatively high voiding from the void-free chip whereas the relatively low voiding is below the resolution of the inspection system. Finally, a further comparison between the void-free and voided solder bumps is carried out by the destructive cross-sectional technique. The comparisons among these different evaluation methods on solder bump voids will be presented in this paper.