Evaluation of Dynamic-Adjusting Threshold-Voltage Scheme for Low-Power FinFET Circuits

Abstract

In this paper, we report on the efforts of applying the dynamic-adjusting threshold-voltage scheme (DATS) to the design of an independent-gate (IG)-mode fin-type field-effect transistor (FinFET) circuit. DATS makes use of the intrinsic advantage of the IG-mode FinFET to adjust the threshold of the front gate with the back-gate bias adaptively according to the operating frequency. Consequently, the power consumption, especially leakage power of the circuit, would be reduced effectively without circuit performance deterioration. By further comparing the circuits where the DATS scheme is employed with the circuits that do not adopt the scheme, the power optimization levels with different path delays in different operating frequency ranges are discussed in detail. A design instance of DATS based on digitally controlled phase-locked loop is implemented with an ASAP 7-nm FinFET model. Simulation results illustrate that by employing DATS the power reduction could be up to 30% in the best case.