Evaluation of Double Process Lithography (DPL) with bi-layer photo-resist process for contact layer-patterning

Abstract

Double Process Lithography (DPL) has been widely accepted as a viable printing technique for critical layers at 45nm nodes and below. In addition, DPL technique also allows us to use available process tool-sets with less capability to develop the next node CMOS devices in early research and development stages with additional photo-masks. One practical issue of applying DPL technique is the process crosstalk, which is the impact of the existing etched patterns after the 1st process to the overall lithography performance during the 2nd printing process. In this paper, we evaluated the DPL process for contact holetype patterning with a 193nm silicon-containing bi-layer photo-resist. We explained the bi-layer photoresist process flow and its low process cross-talk characteristics when applied in our DPL process. We also discussed the challenges of printing small contacts in the DPL process. The preliminary experiment results indicated that silicon-containing photo-resist process is a good candidate for DPL process in the contact hole-type of patterns, and it has good characteristics of low process cross-talk. The flexibility of the drydevelop process in bi-layer resist also offered us another way to form small contacts in the substrate film. At the end, we provided some suggestions in contact pattern decomposition algorithm and related exposure-tool alignment strategies for future implementation of DPL technology.