Abstract

The Java Card technology provides a secure environment for developing smart card application based on Java while also respecting some constraints such as the limited memory and processing card. In addition to the security and cryptography APIs offered by the Java Card technology, the smart card is protected against some threats. But, the fault attacks based on the variation of the physical parameters are able to disrupt its operation. In order to enhance the smart card security, we thought to add an intelligent component able to distinguish between the smooth functioning and the attack. This component is a Neural Network that we developed in C language and integrated in open source Virtual Machine (Avian) in order to simulate the attack effect and the network behavior. In this context, the detection rate of the attacks is 96% with no false positive.

Highlights

  • Developed by Bonech, DeMillo and Lipton [1], the fault attack aims to disrupt the physical environment of the processor operation in order to produce errors

  • We have developed the network in C language and we have integrated it in a Java virtual machine open source called Avian [14]

  • In order to illustrate the suggested protection mechanism and since the Java Card technology runs by the same principle of Java, we used a concrete example with a Java method on a virtual machine

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Summary

Introduction

Developed by Bonech, DeMillo and Lipton [1], the fault attack aims to disrupt the physical environment of the processor operation in order to produce errors. The context of execution concerns several variables Some of these variables are internal, such as the location of the different component of the chip (CPU, RAM, ROM, EEPROM). Others are external such as the signals provided by the terminal (clock, I/O) or the physical environment. In the context of vulnerability analysis on smart cards, the use of the optical induction of errors in the chip through laser beams is widely spread, mainly because it allows attackers to be sufficiently precise with regards to both timing and location of the fault injection. Both in term of coverage or memory footprint, against these attacks is today a real challenge

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