Abstract
The continually increasing complexity of IC integration drives the reduction of device dimensions. Because of this, material loss that alters the device critical dimension (CD) continues to be an important parameter to monitor for device performance. The processes used in advanced device generations therefore need to be well defined to maintain the correct CD. The basic processes used to define the profile were (i) photolithography for device patterning, (ii) dry etch and ash to form the profile and (iii) caros clean for photoresist strip [1]. The lithography and etch tools were critical to fine tune the CDs for each device generation. The accuracy of the CD monitor was very important for tool tuning and optimization. However the basic QC monitor results showed the CD data was more unstable on the patterned monitor wafer requiring additional tool tuning that was not required on the device wafer.
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