Abstract
This paper introduces a laboratory and fabrication procedure for evaluating the cracking performance of chip seal and microsurfacing under various distress conditions using the Texas Overlay Tester. Three damage severity levels were evaluated as part of this study: excellent condition with no cracks, low severity cracks, and medium severity cracks. The data was evaluated using OT cycles to failure, a pseudo-tensile work indicator, and ANOVA to capture the differences among the various samples. The results show the test is sensitive to treatment type and show a decrease in performance with increase in crack severity.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
