Etch simulations for lithography engineers

Abstract

We introduce the concept of etch simulations for lithography engineers. Traditional lithographic simulations begin with a design layout and model the optical and chemical processes involved in reproducing the design as a 3-dimensional photoresist pattern. What we are really after, however, is information about the pattern, as it would appear in silicon. To achieve this goal, we devise an etch algorithm whose inputs include a full lithography simulation and minimal information about an intended etch process. Namely, we take as inputs the horizontal and vertical etch rates for each material in the film stack, the angular distribution of the incoming ion flux, and possibly a fitting coefficient for physical sputtering processes. We then produce a set of output metrics -- before and after etch -- including the CD, sidewall angle, resist loss, etch depth, etc. This gives us the opportunity to look at after etch metrology as a function of traditional lithographic input variables such as focus, exposure dose, etc., and to understand the impact of lithographic changes on after etch CDs and process windows, but without being bogged down with the physical details of the etch process. This simplified approach to etch simulation yields several useful results. In this paper we present a study of the influence of the resist profile on after etch CDs; we look at process window determinations made before and after etch; and we consider OPC variations and their effects on pattern fidelity in post-etch silicon. In addition, we consider the etch module as an extension of the lithography simulator, allowing for modeling of a bilayer resist.