Estimation of doping in junctionless transistors through dc characteristics

Abstract

In this work, a new technique has been developed to extract the doping (Nd) of a junctionless (JL) transistor using dc analysis i.e. transfer characteristics. The proposed method utilises the evaluation of bulk mobility (μbulk) by averaging the values of transconductance (gm) between the limits of threshold (Vth) and flatband (Vfb) voltages of a junctionless device to account for bulk conduction, which can be subsequently used to extract the doping from the volume current. Results show that the extracted doping values are very close to the doping used in the simulations. The methodology is applied to planar (single gate and double gate) as well as non-planar i.e. triple gate and cylindrical nanowire devices. Impact of gate length downscaling and series resistance is also investigated. The validity of the developed approach to predict the doping is also verified through the experimental data published in the literature. The work showcases the potential of a new and relatively simpler approach to estimate the doping of a junctionless transistor by utilising dc characteristics and avoiding the capacitance measurements that often require careful de-embedding techniques.