Abstract

A method for estimating the fatigue life of Pb-free solder (Sn–3.0Ag–0.5Cu) bump joints under thermal cycling is described. The test specimens were 4, 6 and 8mm chip size packages mounted on printed circuit boards. To develop a semi-analytical model for estimating the thermal fatigue life, thermal cycle tests were carried out on the test specimens and the thermal fatigue life obtained experimentally was compared with the corresponding result from nonlinear, elastic–plastic finite element analysis. It was found that the chip size affected the thermal fatigue life and the strain accumulated in the solder bumps during thermal cycling. This was due to the difference in mechanical boundary conditions around the Si chip. Based on the Coffin–Manson law, an equation for estimating the thermal fatigue life was derived and the predicted fatigue life for various chip sizes and under different rises in temperature were found to be in good agreement with the experimental results. Moreover, a measurable parameter that correlates with the accumulated strain in the solder bumps was introduced for estimating the thermal fatigue life of the test specimens.

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