Error feedback based noise shaping in a double sampled ADC

Abstract

A first order error feedback based noise shaping ADC, that obviates the need for high-gain and high output-swing op amps and fast-settling, power-hungry, and noisy reference buffers is proposed. Using a single stage op amp with a gain of 70 (i.e. 37 dB) and output swing of ±75 mV, this topology, realized in GPDK 90-nm CMOS technology, achieves an SNDR of 63 dB operating at 1 GHz (effective sample rate of 2 GHz due to double sampling) with an OSR of 32.