Error detection, fault location and reconfiguration for 2D mesh processing element arrays for digital signal processing

Abstract

Presents a new and efficient error detection and fault location technique suitable for high performance application specific processing element (PE) arrays. In the proposed scheme, two spare PEs are located within four PEs, which forms a reconfigurable fault-tolerant module (RFTM). Any spare can functionally replace any one of the primary PEs within the RTFM. Since spares are physically close to the PEs that they replace, reconfiguration interconnections are short, thus minimizing the performance degradation. The new fault tolerant structure, RFTM, not only provides error detection mechanism, but also achieves fault tolerance. The authors have developed an error detection and fault location algorithm for the RFTM, which makes use of the information that is only available in a fault tolerant structure, but not available in other local redundancy techniques. Then, a systematic way of fault isolation was presented. A major contribution of this paper is that the authors approached the error detection, fault location and fault isolation in a unified way within the RFTM. The simple error detection and fault location mechanism turned out to result in a lean implementation of RFTM. >