EQUAL: Efficient QUasi Adiabatic Logic for Enhanced Side-Channel Resistance

Abstract

Adiabatic circuits have the potential to achieve ultra-low power consumption while also exhibiting inherent resistance against power side-channel attacks. A novel adiabatic logic family is proposed in this work with application to lightweight devices where both energy efficiency and hardware security are of primary concern. The side-channel security characteristics of the proposed adiabatic logic are evaluated by quantifying normalized energy deviation (NED) and the normalized standard deviation (NSD). These metrics are compared with the existing secure adiabatic logic families. The simulations are performed at an RFID frequency of 13.56 MHz using a 65 nm technology node. The average energy per transition consumed by the NAND/AND and NOR/OR gates in the proposed logic family is up to 34.5% lower at the expense of 3% increase in the NED and 1.5% increase in the NSD. The proposed approach also reduces the number of transistors by 40%. Furthermore, the proposed adiabatic logic family does not require any external four-phase input signals to achieve input-independent power consumption, thereby significantly reducing the overall overhead.