Epitaxial Si growth on fin for NMOS device performance improvement

Abstract

This work presents an integrated process to grow epitaxial Si film on NMOS fin S/D (source/drain) area. The Si epitaxy growth behavior has been compared between pure Si epitaxy (Si epitaxy without in-situ P doping) and SiP epitaxy (Si epitaxy with in-situ P doping). Good epitaxy film quality has been achieved with process optimization for pure Si epitaxy. The main factors that have impact on pure Si epitaxy film profile have been studied. Additional ion implantation has been implemented after pure Si epitaxy to increase surface doping concentration for contact resistance reduction. Compared to FinFET device without pure Si epitaxy, contact resistance has been dramatically reduced. NMOS device performance also has significant improvement with pure Si epitaxy owing to reduced external resistance.