Abstract

As metal-oxide-semiconductor field-effect transistor (MOSFET) devices are shrunk to the nanometer scale, flat shallow metal/Si electrical contacts must be formed in the source/drain region. This work demonstrates a method for the formation of epitaxial NiSi 2 layers by a solid-phase reaction in Ni–P(8 nm)/Si(1 0 0) samples. The results show that the sheet resistance remained low when the samples were annealed at temperatures from 400 to 700 °C. P atoms can be regarded as diffusion barriers against the supply of Ni to the Si substrate, which caused the formation of Si-rich silicide (NiSi 2) at low temperature. Furthermore, elemental P formed a stable capping layer with O, Ni and Si during the annealing process. A uniform NiSi 2 layer with an atomically flat interface was formed by annealing at 700 °C because of the formation of a Si–Ni–P–O capping layer and a reduction in the total interface area.

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