Epitaxial growth of SiGe layers for BiCMOS applications

Abstract

Silicon–germanium materials have introduced the opportunity to engineer the energy band gap of Si, leading to a wide range of microelectronic device applications. The growth of high quality SiGe layers by chemical vapor deposition at reduced temperature and pressure has already been reported from our GRESSI Program [1]. In addition to these results we have studied the thermal stability of Si–Ge strained layers to be used as the base of heterojunction bipolar transistors (HBTs) or the channel of MOS structures. Indeed, layer growth conditions such as temperature, Ge content and selectivity/non-selectivity may induce structural defects such as misfit dislocations, leading to leaky devices and less performant ICs. Using an industrially available CVD single wafer reactor we have fabricated and studied Si/SiGe stacks for CMOS and BiCMOS applications. In the present paper the obtained electrical results on HBTs are correlated with the growth parameters and observed structural defects, in order to optimise device characteristics and process windows.