Abstract

In this paper, a pulse width and frequency modulation (PWFM) control strategy is presented, which combines the one-comparator counter-based pulse width modulation (PWM) control with pulse frequency modulation (PFM) control to increase pseudo-1-bit resolution under constant-frequency operation. Accordingly, system stability will be enhanced significantly. As compared with the traditional counter-based PWM control, there is no difference in off-chip circuit complexity except a slight change in on-chip hardware. Finally, a prototype circuit is used to verify the proposed control concept by some experimental results with no limit cycle oscillation.

Highlights

  • Up to now, much research on the accuracy of the pulse width modulation (PWM) has been conducted

  • The corresponding cost is high, and this special process is usually used in the manufacture of the central processing unit (CPU) or the graphic processing unit (GPU)

  • The solution of the limit cycle oscillation that is only based on high-resolution digital pulse width modulation (DPWM) is enough

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Summary

Introduction

Much research on the accuracy of the pulse width modulation (PWM) has been conducted. The literature [6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21] focus on how to reduce the number of digital pulse width modulation (DPWM) steps, where the high-switching clock, e.g., counter-based DPWM, is achieved based on special structures [7,19,20,21]. Some researches increase the effective duty cycle to achieve high-accuracy resolution, for example, digital dither [23], sigma-data [8,10,18], special modulation [24], and PFM [25]. Whereas there is no difference in off-chip circuit complexity between the two control strategies

Problem Description
Discussion of Compensator
ADC Strategy
Waveforms
Requirements of Resolution of DPWM and ADC
Calculation of VFB Duty
Gain Analysis of Digital
Right z-Bit Shift Block
PWFM Control Concept
10. Experimental
13. Waveforms based on on the the traditional traditional PWM
11. Conclusion
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