Enhancement of SSE-LED Light Emission By Embedding CdS in Zr-Doped HfO2 High-K Film

Abstract

White light emission from the solid-state incandescent light emitting device (SSI-LED) has been reported and studied [1-4]. This kind of device is made of a metal-oxide-semiconductor (MOS) structure composed of a thin high-k dielectric film on the p-type Si substrate [1-4]. Nano-sized conductive paths are formed from the dielectric breakdown process. Light is emitted from the passage of the current through the conductive paths according to the blackbody emission principle [4]. Since the complete device is made with IC-compatible materials and processes, among many possible application, it is a potential light source for the on-chip optical interconnect [5]. The light emission efficiency of the SSI-LED can be enhanced by embedding a layer of nc-ZnO, nc-CdSe, WOx, etc. into the high-k dielectric [1,4,6]. In this paper, authors investigated the light emission enhancement phenomenon of the CdS embedded Zr-doped HfO2 (ZrHfO) high-k film dielectric. The ZrHfO/CdS/ZrHfO tri-layer was sputter deposited on a p-type Si <100> (1015 cm-3) wafer by one pump down without breaking the vacuum. The ZrHfO films were deposited from a ZrHf (12/88 wt. %) target under Ar/O2 (1:1) at 5 mTorr and 60 W, i.e., 2 min for the bottom layer and 10 min for the top layer. The CdS layer was deposited from a CdS target in Ar at 5 mTorr and 60 W for 3 min. The sample was annealed at 900°C in N2 for 3 min. Then, the ITO film was deposited on the high-k stack and etched into gate electrodes. The complete device was finished after depositing an Al layer on the back of the wafer followed by annealing at 300°C for 5 min in H2/N2. For the comparison purpose, a control sample, i.e., without the embedded CdS layer in the ZrHfO film, was prepared. Light emission patterns and spectra of the SSI-LED were measured at different gate voltages (Vg ’s). Figure 1 shows the top-view light emission patterns of the control and CdS embedded devices stressed at Vg = -50 V. Discrete bright dots are uniformly distributed across the gate electrode region. Each dot corresponds to a conductive path in the dielectric layer. The CdS embedded sample contains more dots than the control sample does. It was reported that the breakdown strength of the high-k stack decreased markedly with the including of the CdS layer because of the introducing of additional defects [7]. Thus, the CdS embedded sample is much easier to form conductive paths through the high-k thin film under the same Vg stress. Figure 2 shows the light emission spectra graph of the control and CdS embedded samples stressed at Vg = -50 V. Both spectra cover the same wavelength range including the visible and some of the near IR wavelengths. The shape and the peak wavelength, i.e., near 700 nm, of the emission spectrum are little influenced by the existing of the CdS layer. Therefore, the light emission principle in the two device are the same, i.e., thermal excitation of conductive paths. The CdS embedded SSI-LED has a much higher light intensity than the control SSI-LED has, which is consistent with the result of Fig. 1. The more nano-resistors are formed, the stronger light is emitted from the SSI-LED. Based on the spectra in Fig. 2, the CIE color coordinates, color correlated temperature (CCT), and color rendering index (CRI) values were calculated and listed in Table 1. The CdS embedded sample has slightly higher CCT and CRI Ra values than the control sample has, which is due to the higher local temperature in the former. The leakage current of the CdS embedded device is larger than that of the control sample. In summary, the embedding of CdS into the ZrHfO high-k dielectric enhanced the light emission properties of the SSI-LED through increases of the number of conductive paths and the leakage current in the structure. [1] Y. Kuo et al, APL, 102, 031117 (2013). [2] Y. Kuo et al, ESSL, 2, Q59 (2013). [3] Y. Kuo et al, SSE, 89, 120 (2013). [4] C.-C. Lin et al, APL, 106, 121107 (2015). [5] S. Zhang et al, ECS JSS, 6 (4), Q39, 2017. [6] S. Zhang et al, ECST, 66 (4), 195 (2015). [7] S. Zhang et al, IEEE TDMR, 16 (4), 561 (2016). Figure 1