Abstract
This paper presents a novel nanoscale tunnel FET consisting of an Esaki tunneling diode in the source region. A unique part of the source region is replaced by a heavily doped N-type silicon material establishing a tunneling diode inside the source region. Also, the gate metal is deliberately extended into the source region in order to more couple the created tunneling diode inside the source region. In the result of this new configuration, the band energy bending occurs inside the source region and also the potential barrier will be modified in the channel region thus increasing the ratio of ION to IOFF (ION/IOFF) and reducing the leakage current and ambipolar current for the proposed structure. The proposed structure has been compared with the conventional TFET and PNPN-TFET structure in terms of the ION/IOFF, Leakage current, ambipolar current, drain-source conductance, short channel effects, source-drain capacitance and minimum noise figure showing a performance superiority with respect to other structures under the study.
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