Enhanced thermoelectric performance of vertically aligned silicon nanowires through the cold spot effect and charge carrier trapping effect of attached gold nanoparticles

Abstract

The thermoelectric performance of vertically aligned silicon (Si) nanowires (NWs) with diameters of 100–150 nm fabricated through metal-assisted chemical etching is improved using electroless-deposited gold (Au) nanoparticles (NPs) (ф ≈ 10 nm). After the deposition of metal NPs, the thermal conductivity and Seebeck coefficient of the Si NWs decrease 5.78-fold and increased 2.71-fold, respectively. Despite the 3.23-fold increase in the electric resistivity of Si NWs through the deposition of Au NPs, the figure of merit of the Au NP-deposited Si NWs is enhanced by 1320% (0.444) compared to that of pristine Si NWs (0.0337). The power factor is enhanced 2.28-fold after Au NP deposition (0.175–0.400 mV·K−2m−1). Based on finite-element method simulations of Au NP-deposited Si NW, a cold spot is generated inside the Si NW by the attached Au NP. Moreover, charge carrier trapping at the interface between the Si NW and Au NP is anticipated due to interfacial Fermi-level pinning. Cold spot and charge carrier trapping effects are proposed as important factors for enhancing the thermoelectric performance of Au NP-deposited Si NWs.