Abstract

We demonstrate an enhanced photo-sensitivity (PS) through an increased light-trapping using surface nano-structuring technique by inductively coupled plasma (ICP) etching on multi-walled carbon nanotube (MWCNT) etch masked Si with hexamethyl-disilazane (HMDS) dispersion. In order for a systematic comparison, four samples are prepared, respectively, by conventional photolithography and ICP etching using MWCNT as a etch mask. MWCNT-etched Si with HMDS dispersion shows the highest RMS roughness and the lowest reflectance of the four. Two test device structures are fabricated with active regions of bare-Si as a reference and MWCNT etch masked Si with HMDS dispersion. The increased light-trapping was most significant at mid-UV, somewhat less at visible and less noticeable at infrared. With an ICP-etched Si using CNT HMDS dispersion, PS is very sharply increased. This result can lead to applications in optoelectronics where the enhancement in light-trapping is important.

Highlights

  • Light-trapping, in other word optical absorption, in such device applications as photovoltaics, light-emitting diodes, light sensors, photo-diodes, and transistors, plays an important role in their device functionality and in order to suppress reflection losses and increase conversion efficiency [1,2,3,4,5,6,7,8,9,10]

  • We demonstrate an enhanced photo-sensitivity (PS) through an increased light-trapping on Si, which is achieved by increasing surface roughness and suppressing reflection losses through a surface nano-texturing using inductively coupled plasma (ICP) etching

  • Two test device structures were fabricated using bare-Si and an ICPetched Si using multi-walled carbon nanotube (MWCNT) dispersed in HMDS for a comparison of PS

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Summary

Introduction

Light-trapping, in other word optical absorption, in such device applications as photovoltaics, light-emitting diodes, light sensors, photo-diodes, and transistors, plays an important role in their device functionality and in order to suppress reflection losses and increase conversion efficiency [1,2,3,4,5,6,7,8,9,10]. Experimental details In this experiment, in order to perform surface morphology, RMS roughness, and reflectance analyses, four Si samples were prepared: bare-Si (sample A), square trenchpatterned Si using conventional wet chemical etching (sample B), ICP-etched Si using MWCNT-dispersion in isopropyl-alcohol (sample C), and another ICP-etched Si using MWCNT-dispersion in HMDS (sample D). Two test device structures were fabricated using bare-Si and an ICPetched Si using MWCNT dispersed in HMDS for a comparison of PS. An silicon on insulator (SOI) wafer was used for the device fabrication, which included 350 μm of p-type Si with a doping of 1017 cm-3, 100 nm of SiO2, and another 100 nm thick p-type Si at the top with a doping of 1017 cm-3 Both test structures were exactly the same except the active regions: bare-Si for one and ICP-etched Si for the other. For the I-V characterization, Keithley Semiconductor Characterization System (SCS-4200) was used under dark and at illumination (approximately 200 nm) with a power density of approximately 137 mW/cm

Results and discussion
Conclusions
20. Wijewardane S
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