Abstract

This paper presents a fully-integrated linear CMOS power amplifier (PA) with an adaptive gate bias circuit in Common-Gate (CG) amplifiers. The bias circuit is proposed to achieve a high linearity with deep class-AB biasing of Common-Source (CS) stage. The proposed single stage PA including the bias circuit is fabricated using 0.18-μm RF CMOS technology. The adaptive gate bias circuit improves the evolved universal terrestrial radio access adjacent channel leakage ratio (ACLRE-UTRA) about 7 dB at a mid power region and 2.5 dB at a high power over a constant bias for the same LTE signal.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.