Enhanced characteristics in gate-recessed and sidewall-recessed AlGaAs/InGaAs PHEMTs by citric-based selective wet etching

Abstract

Improved device performance in Al0.2Ga0.8As/In0.15Ga0.85As gate-recessed enhancement-mode pseudomorphic high electron mobility transistors (E-PHEMTs) and sidewall-recessed depletion-mode PHEMTs (D-PHEMTs) using a newly developed citric buffer etchant are reported. The innovated etchant near room temperature (23°C) possesses a high GaAs/Al0.2Ga0.8As or In0.15Ga0.85As/Al0.2Ga0.8As etching selectivity (>250) applied to an etched stop surface. For E-PHEMTs, the transconductance (Gm) of 315 mS/mm and high linearity of 0.46 V-wide gate voltage swing (drop of 10% peak Gm), corresponding to 143 mA/mm-wide IDS, even at a gate length of 1 µm is obtained. For microwave operation, this 1 µm-gate E-PHEMT shows the fmax (maximum operation frequency) of 29.2 GHz and the fT (cut-off frequency) of 11.2 GHz, respectively. The measured minimum noise figure (NFmin), under VDS = 3 V and IDS = 7.5 mA, is 0.56 dB at 1 GHz with the associated gain of 10.86 dB. The NFmin is less than 1.5 dB in the frequency range from 1 to 4 GHz. In addition, an effective and simple method of selective gate sidewall recess is utilized to etch the low barrier in In0.15Ga0.85As channel at mesa sidewalls for D-PHEMTs. For D-PHEMTs with 1 × 100 µm2 exhibit a very low gate leakage current of 2.4 μA/mm even at VGD = −10 V and high gate breakdown voltage over 25 V. As compared to that of no sidewall recess, nearly two orders of reduction in magnitude of gate leakage current and 100% improvement in gate breakdown voltage are achieved.