Abstract
This paper introduces a method for enhancing the charge capacity and lowering the leakage current in CCD's. The two-phase coplanar electrode structure is chosen as a vehicle for demonstrating the concept. The charge capacity enhancement is achieved by a combination of p-type and n-type implantations. This method of charge capacity enhancement relies on the increase of depletion capacitance in the storage well region of the CCD, as contrasted with other methods which increase the surface potential swing. A charge capacity analysis is undertaken and design constraints to provide maximum charge capacity are described. Results of measurements on the first test structure show 25-50-percent increase in charge capacity for buried-channel CCD's and 66-166-percent increase in charge capacity for surface-channel CCD's. A 2X-8X reduction in leakage current has been observed in these CCD's. The increased capacity and decreased leakage current should result in improved performance of CCD's in memory, signal processing, and imaging applications.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
