Enhanced bonding strength of InP/Si chip-on-wafer by plasma-activated bonding using stress-controlled interlayer

Abstract

To realize next-generation photonic integrated circuits based on the III–V/Si hybrid integration platform using chip-on-wafer (CoW) direct bonding technologies, high-yield collective bonding of InP chips on Si substrates with a high bonding strength is required. This study demonstrates high-yield InP/Si CoW plasma-activated bonding using a chip holder with pockets, the depth of which is precisely controlled. Additionally, finite element simulations are used to determine that the stress-controlled interlayer consisting of InP-based epitaxial layers with tensile strain effectively suppresses stress at the InP/Si bonding interface, which affects the bonding strength. Thus, a high bonding strength of 20 MPa in 2 mm × 2 mm InP chips on the Si substrate was achieved by introducing a superlattice structure consisting of GaInAsP and InP (with tensile strain) as the stress-controlled interlayer.