Abstract
In this paper, a method is proposed to enhance the self-aligned split-gate flash cell performance. Utilizing the different oxidation rate between silicon substrate and the heavily-doped poly-silicon sidewall of the floating gate, a rapid-thermal-oxidation step before oxide deposition is proved to be effective to decouple the tunnel oxide thickness from the select gate (SG) oxide thickness. 0.18 μm self-aligned split-gate flash cell fabricated with this method is characterized. The erase speed is shown slightly faster even with the erase voltage lowered by 1 V. The read current in erased state is improved by 70%. Good endurance and data retention performances are also demonstrated.
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