Abstract
Binary phase shift keying (BPSK) and quadrature phase shift Keying (QPSK)modulation techniques are often proposed for satellite communications and band-limited communication channels; however, both modulations are important in high speed data communications. High speed data communications are implemented on high speed hardware in wireless systems. The paper presents the design of a QPSK and BPSK digital communication modulators and their implementations on high speed field-programmable gate array (FPGA) using Quartus II. Also, for these modulation schemes, resource utilization was introduced. Both modulations were designed in Quartus II using VHDL hardware description language. It was shown that transmission of QPSK modulator is fast than transmission of BPSK modulator at the same bit error performance. According to BPSK, QPSK modulator uses more memory. But other resources equal to for these modulation. Principles of the BPSK modulation and QPSK modulation are illustrated using schematic diagrams. The analysis of theoretical aspects of the BPSK and QPSK modulations are represented. Both modulations waveforms are illustrated using a simulation program. Implementations of the BPSK and QPSK systems on FPGA are shown using algorithms of modulator. Key words: Binary phase shift keying (BPSK), quadrature phase shift Keying (QPSK), field-programmable gate array (FPGA).
Highlights
In recent years, with the high-speed development, satellite communication has been implemented in various areas, such as remote sensing, mobile communication, digital satellite TV and so on (Tianjun and Wenrui, 2008)
This paper is aimed at performance comparison of Binary phase shift keying (BPSK) and quadrature phase shift Keying (QPSK) modulator
This comparison consists of modulating time, power consumption and resource utilization
Summary
With the high-speed development, satellite communication has been implemented in various areas, such as remote sensing, mobile communication, digital satellite TV and so on (Tianjun and Wenrui, 2008). Data rate of a designed FPGA based QPSK modulator is about 2 Mbps. In this design, for carrier signal, using square wave signal QPSK modulator was created (Elamary et al, 2009). This paper mainly concentrates on the hardware realization of modulators for BPSK and QPSK techniques These modulator schemes were created by the fastest data transfer method. In numerous studies, FPGA-based QPSK modulator or BPSK modulator was presented, resource utilization or power consumption issues were not discussed. In order to reveal these unclear issues, such as resource utilization and power consumption, device utilization was presented in this work. Data bits are multiplied with a carrier signal and modulated signal is created. The signals of the QPSK modulation are defined in (3),
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