Engineering Reconfigurable Product Families - Architecting the Variability Infrastructure of a Product Family On-Chip

Abstract

The software product family paradigm is becoming increasingly relevant in embedded system development. Embedded system development with a software-intensive character is typically a complex and time consuming process. Software functionality is often developed independently of hardware functionality and functional elements are not reused across similar products due to implicit, unexpected or even unknown dependencies across the system. This paper discusses a case study in architecting the variability (reuse) infrastructure of a dynamically reconfigurable product family on-chip. The goal of the study is to provide an engineering approach for architecting the variability infrastructure of a dynamically reconfigurable product family in a repeatable manner. The study applies the software product family paradigm in the context of run-time reprogrammable hardware technology and discusses the characteristics of the variability infrastructure in relation to product family development and deployment.